1-wire总线verilog代码（with testbench）

1-wire总线verilog代码(with testbench) 1-wire总线verilog代码(with testbench)

 属性            大小     日期    时间   名称
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     文件        607  2011-07-15 17:17  myonewire\1_wire_verification\onewire_top.v

     文件       1321  2011-07-15 21:58  myonewire\1_wire_verification\Read_Device.v

     文件       1520  2011-07-15 21:03  myonewire\1_wire_verification\Rst_Device.v

     文件        797  2011-07-15 21:22  myonewire\1_wire_verification\tb_onewire.v

     文件       1290  2011-07-15 21:52  myonewire\1_wire_verification\Write_Device.v

     目录          0  2011-10-10 20:29  myonewire\1_wire_verification

     目录          0  2011-10-10 20:20  myonewire

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