FPGA串口8位转32位收发数据

此为FPGA串口8转32位收发数据，笔者亲测可用，接收与发送数据都进行了32位的转化，希望可以帮助到有需要的朋友们

 属性            大小     日期    时间   名称
----------- ---------  ---------- -----  ----
     目录           0  2018-07-16 15:33  uart_test\
     目录           0  2018-07-16 15:37  uart_test\project_1\
     目录           0  2018-07-16 15:34  uart_test\project_1\project_1.cache\
     目录           0  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\
     目录           0  2018-07-17 17:56  uart_test\project_1\project_1.cache\ip\2017.3\
     目录           0  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94\
     文件        9205  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94\clk_wiz_0.dcp
     文件        7338  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94\clk_wiz_0_sim_netlist.v
     文件        7297  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94\clk_wiz_0_sim_netlist.vhdl
     文件        1305  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94\clk_wiz_0_stub.v
     文件        1341  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94\clk_wiz_0_stub.vhdl
     文件       38476  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94\fe53fe9c794f1c94.xci
     目录           0  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94.logs\
     文件        4512  2018-07-16 15:38  uart_test\project_1\project_1.cache\ip\2017.3\fe53fe9c794f1c94.logs\runme.log
     目录           0  2018-07-16 15:39  uart_test\project_1\project_1.cache\wt\
     文件        6045  2018-07-17 18:09  uart_test\project_1\project_1.cache\wt\gui_handlers.wdf
     文件        2015  2018-07-17 18:09  uart_test\project_1\project_1.cache\wt\java_command_handlers.wdf
     文件         122  2018-07-17 18:03  uart_test\project_1\project_1.cache\wt\project.wpc
     文件        5394  2018-07-17 17:57  uart_test\project_1\project_1.cache\wt\synthesis.wdf
     文件         100  2018-07-17 17:57  uart_test\project_1\project_1.cache\wt\synthesis_details.wdf
     文件        6074  2018-07-17 18:09  uart_test\project_1\project_1.cache\wt\webtalk_pa.xml
     目录           0  2018-07-17 18:03  uart_test\project_1\project_1.hw\
     目录           0  2018-07-16 15:47  uart_test\project_1\project_1.hw\hw_1\
     文件         837  2018-07-17 18:09  uart_test\project_1\project_1.hw\hw_1\hw.xml
     目录           0  2018-07-17 18:11  uart_test\project_1\project_1.hw\hw_1\wave\
     文件         343  2018-07-16 15:46  uart_test\project_1\project_1.hw\project_1.lpr
     目录           0  2018-07-16 15:38  uart_test\project_1\project_1.ip_user_files\
     文件         130  2018-07-16 15:37  uart_test\project_1\project_1.ip_user_files\README.txt
     目录           0  2018-07-16 15:37  uart_test\project_1\project_1.ip_user_files\ip\
     目录           0  2018-07-16 15:38  uart_test\project_1\project_1.ip_user_files\ip\clk_wiz_0\
     文件        3643  2018-07-16 15:37  uart_test\project_1\project_1.ip_user_files\ip\clk_wiz_0\clk_wiz_0.veo
............此处省略337个文件信息