Triple-Speed Ethernet（tse）FPGA软核MAC官方

Triple-Speed Ethernet(tse)FPGA软核MAC官方实例 http://blog.csdn.net/xgbing/article/details/8557144

#ifdef ALT_INICHE
    #include “ipport.h“
#endif

#include “system.h“
#include “altera_avalon_tse.h“
#include “altera_avalon_tse_system_info.h“

alt_tse_system_info tse_mac_device[MAXNETS] = {
		TSE_SYSTEM_EXT_MEM_NO_SHARED_FIFO（TSE_MAC 0 SGDMA_TX SGDMA_RX TSE_PHY_AUTO_ADDRESS &marvell_cfg_rgmii DEscriptOR_MEMORY）
		
};

 属性            大小     日期    时间   名称
----------- ---------  ---------- -----  ----
     文件         345  2010-11-15 16:38  tserd\altmemddr2_ynbnbsh3_phy_summary.csv
     文件        3646  2010-11-15 16:03  tserd\global_reset_generator.v
     目录           0  2010-11-15 16:03  tserd\ip\
     目录           0  2010-11-15 16:03  tserd\ip\dummy_master\
     文件         890  2010-11-15 16:03  tserd\ip\dummy_master\dummy_master.v
     文件        3021  2010-11-15 16:03  tserd\ip\dummy_master\dummy_master_hw.tcl
     文件         624  2010-11-15 16:37  tserd\PLLJ_PLLSPE_INFO.txt
     文件       74806  2010-11-15 16:02  tserd\qsys_tserd_3c120.qsys
     文件      915771  2010-11-15 16:10  tserd\qsys_tserd_3c120.sopcinfo
     目录           0  2010-11-15 16:07  tserd\qsys_tserd_3c120\
     目录           0  2010-11-15 16:10  tserd\qsys_tserd_3c120\synthesis\
     文件       46823  2010-11-15 16:10  tserd\qsys_tserd_3c120\synthesis\qsys_tserd_3c120.qip
     文件     1290843  2010-11-15 16:07  tserd\qsys_tserd_3c120\synthesis\qsys_tserd_3c120.v
     目录           0  2010-11-15 16:10  tserd\qsys_tserd_3c120\synthesis\submodules\
     文件       14749  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_addr_cmd.v
     文件       18475  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_afi_block.v
     文件       13358  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_avalon_if.v
     文件       64882  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_bank_timer.v
     文件       13927  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_bank_timer_info.v
     文件      122401  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_bank_timer_wrapper.v
     文件       45678  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_bypass.v
     文件       13668  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_cache.v
     文件        4262  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_clock_and_reset.v
     文件       22561  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_cmd_gen.v
     文件       37685  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_cmd_queue.v
     文件       76206  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_controller.v
     文件       46438  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_csr.v
     文件       11608  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_ddr2_odt_gen.v
     文件        4915  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_ddr3_odt_gen.v
     文件        2454  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_decoder.v
     文件       18708  2010-11-15 16:08  tserd\qsys_tserd_3c120\synthesis\submodules\alt_ddrx_decoder_40.v
............此处省略364个文件信息