7系列FPGA原语例程

7系列的Verilog/VHDL原语使用例程，可用NotePad或UltraEdit等工具打开查看

 属性            大小     日期    时间   名称
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     目录           0  2016-09-20 20:19  7_Series_Library_Templates\
     文件        2333  2016-09-20 20:19  7_Series_Library_Templates\readme.txt
     目录           0  2016-09-20 20:19  7_Series_Library_Templates\Verilog\
     文件        1304  2016-09-20 20:19  7_Series_Library_Templates\Verilog\ADDMACC_MACRO.veo
     文件         992  2016-09-20 20:19  7_Series_Library_Templates\Verilog\ADDSUB_MACRO.veo
     文件       15358  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BRAM_SDP_MACRO.veo
     文件       14811  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BRAM_SINGLE_MACRO.veo
     文件       15972  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BRAM_TDP_MACRO.veo
     文件        1205  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BSCANE2.veo
     文件         234  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFG.veo
     文件         315  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFGCE.veo
     文件         344  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFGCE_1.veo
     文件         928  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFGCTRL.veo
     文件         348  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFGMUX.veo
     文件         378  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFGMUX_1.veo
     文件         375  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFGMUX_CTRL.veo
     文件         254  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFH.veo
     文件         473  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFHCE.veo
     文件         300  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFIO.veo
     文件         282  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFMR.veo
     文件         476  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFMRCE.veo
     文件         638  2016-09-20 20:19  7_Series_Library_Templates\Verilog\BUFR.veo
     文件         358  2016-09-20 20:19  7_Series_Library_Templates\Verilog\CAPTUREE2.veo
     文件         457  2016-09-20 20:19  7_Series_Library_Templates\Verilog\CARRY4.veo
     文件         655  2016-09-20 20:19  7_Series_Library_Templates\Verilog\CFGLUT5.veo
     文件         896  2016-09-20 20:19  7_Series_Library_Templates\Verilog\COUNTER_LOAD_MACRO.veo
     文件         945  2016-09-20 20:19  7_Series_Library_Templates\Verilog\COUNTER_TC_MACRO.veo
     文件         325  2016-09-20 20:19  7_Series_Library_Templates\Verilog\DCIRESET.veo
     文件         570  2016-09-20 20:19  7_Series_Library_Templates\Verilog\DNA_PORT.veo
     文件        6750  2016-09-20 20:19  7_Series_Library_Templates\Verilog\DSP48E1.veo
     文件         360  2016-09-20 20:19  7_Series_Library_Templates\Verilog\EFUSE_USR.veo
............此处省略239个文件信息