Xilinx zynq PS 透过bram和dma和PL进行数据交互

PL透过bram 向PL传递 0-9的数据,PL进行数据处理后( 在此为了简化,就将所取得的数据 + 100 返回) 透过dma 传回PS https://blog.csdn.net/howard789/article/details/111194482

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     文件       3008  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\xsim.dir\snapshot\xsim.dbg

     文件       1784  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\xsim.dir\snapshot\xsim.rtti

     文件      11217  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\zip_work\hw_ila_data_1.wcfg

     文件       8670  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\zip_work\hw_ila_data_1.wdb

     文件      25403  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\zip_work\probes.ltx

     文件     207533  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\zip_work\waveform.csv

     文件     851370  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\zip_work\waveform.dmp

     文件       1693  2020-12-14 18:58  example_bram_dma\.Xil\Vivado-22876-DESKTOP-R8T0NF5\hw_ila_data_1\zip_work\waveform.vcd

     文件       6953  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1231bce321126d9e\1231bce321126d9e.xci

     文件         55  2020-12-14 16:46  example_bram_dma\example_bram_dma.cache\ip\2018.3\1231bce321126d9e\stats.txt

     文件     135503  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1231bce321126d9e\system_axis_data_fifo_0_0.dcp

     文件     211799  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1231bce321126d9e\system_axis_data_fifo_0_0_sim_netlist.v

     文件     323999  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1231bce321126d9e\system_axis_data_fifo_0_0_sim_netlist.vhdl

     文件       2148  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1231bce321126d9e\system_axis_data_fifo_0_0_stub.v

     文件       2265  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1231bce321126d9e\system_axis_data_fifo_0_0_stub.vhdl

     文件     166509  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1f9dce0fb4e96605\1f9dce0fb4e96605.xci

     文件     154602  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1f9dce0fb4e96605\system_xbar_0.dcp

     文件     172796  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1f9dce0fb4e96605\system_xbar_0_sim_netlist.v

     文件     207556  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1f9dce0fb4e96605\system_xbar_0_sim_netlist.vhdl

     文件       5735  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1f9dce0fb4e96605\system_xbar_0_stub.v

     文件       6746  2020-12-14 10:41  example_bram_dma\example_bram_dma.cache\ip\2018.3\1f9dce0fb4e96605\system_xbar_0_stub.vhdl

     文件       7929  2020-12-14 16:56  example_bram_dma\example_bram_dma.cache\ip\2018.3\358b79ec8b33a7bc\358b79ec8b33a7bc.xci

     文件     943243  2020-12-14 16:56  example_bram_dma\example_bram_dma.cache\ip\2018.3\358b79ec8b33a7bc\system_axi_dma_0_0.dcp

     文件    1789053  2020-12-14 16:56  example_bram_dma\example_bram_dma.cache\ip\2018.3\358b79ec8b33a7bc\system_axi_dma_0_0_sim_netlist.v

     文件    2208880  2020-12-14 16:56  example_bram_dma\example_bram_dma.cache\ip\2018.3\358b79ec8b33a7bc\system_axi_dma_0_0_sim_netlist.vhdl

     文件       5748  2020-12-14 16:56  example_bram_dma\example_bram_dma.cache\ip\2018.3\358b79ec8b33a7bc\system_axi_dma_0_0_stub.v

     文件       5753  2020-12-14 16:56  example_bram_dma\example_bram_dma.cache\ip\2018.3\358b79ec8b33a7bc\system_axi_dma_0_0_stub.vhdl

     文件     499384  2020-12-14 18:30  example_bram_dma\example_bram_dma.cache\ip\2018.3\4811d563bbc3979d\4811d563bbc3979d.xci

     文件    1258447  2020-12-14 18:30  example_bram_dma\example_bram_dma.cache\ip\2018.3\4811d563bbc3979d\system_system_ila_0_0.dcp

     文件    2787634  2020-12-14 18:30  example_bram_dma\example_bram_dma.cache\ip\2018.3\4811d563bbc3979d\system_system_ila_0_0_sim_netlist.v

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