FPGA数字信号处理四Quartus FIR IP核实现

调用Quartus的FIR Compiler IP核完成FIR滤波，含testbench与仿真，仿真结果优秀；具体说明可参考本人博客。CSDN博客搜索：FPGADesigner

%                                                                                                                                       
%THIS IS A WIZARD GENERATED FILE. DO NOT EDIT THIS FILE!                                                                                
%                                                                                                                                       
%---------------------------------------------------------------------------------------------------------                              
%This is a filter withfixed coefficients 
%This Model Only Support Single Channel Input Data. 
%Please input:                                                                                                                          
%data vector: 		stimulation（1:n）                                                                                                 
%                                                                                                                                       
%    This Model Only Support FIR_WIDTH to 51 Bits
%                                                                                                                                       
%FILTER PARAMETER                                                                                                                       
%Input Data Type:	Signed
%Input Data Width:	12
%FIR Width （Full Calculation Width Before Output Width Adjust） :   28
%-----------------------------------------------------------------------------------------------------------

	%MegaWizard Scaled Coefficient Values
	function  output = fir_mlab_mat （stimulation output）
	coef_matrix=[-2 14 46 -117 -262 589 2047 2047 589 -262 -117 46 14 -2 ];
	INTER_FACTOR  = 1;
	DECI_FACTOR  = 1; 
	MSB_RM  = 0;
	MSB_TYPE  = 0;
	LSB_RM  = 0;
	LSB_TYPE  = 0;
	FIR_WIDTH  = 28;
	OUT_WIDTH  = FIR_WIDTH - MSB_RM - LSB_RM ;
	DATA_WIDTH = 12;
            
	data_type= 1;

        % check size of inputs.
        [DXDY] = size（stimulation）;
        [CXCY] = size（coef_matrix）;
        if （CX ~= DY * INTER_FACTOR）
	        fprintf（‘WARNING : coef_matrix size and input data size is not match\n‘）;
        end
        
        %fill coef_matrix to length of data with the latest coef set
        if （CX < DY * INTER_FACTOR）
            for i= CX +1:DY * INTER_FACTOR
                coef_matrix（i:） = coef_matrix（CX:）;
            end
        end

        %check if input is integer
       	int_sti=round（stimulation）;
	    T = （int_sti ~= stimulation）;
	    if （max（T）~=0）
	        fprintf（‘WARNING : Integer Input Expected: Rounding Fractional Input to Nearest Integer...\n‘）;
	    end
	    
	    %Input overflow check
	    switch  data_type
	    case 1
	        %set max/min for signed
	        maxdat = 2^（DATA_WIDTH-1）-1;
	        mindat = -maxdat-1;
	    case 2
	        %set max/min for unsigned
	        maxdat = 2^DATA_WIDTH-1